GE Intelligent Platforms > Support >  Drivers - General > DG67
GE6 GE-Fanuc- CCM2
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Description
ProductVersionModule
HMI/SCADA - iFIX All All
Code : GE6
Vendor : GE Intelligent Platforms
Hardware Manufacturer : General Electric
Notes : Available for use with FIX32 and iFIX only.

General

Platform Latest Version Type
Windows 2000 6.01 COM
Windows 3.1 5.3 COM
Windows 95 6.01 COM
Windows NT 6.01 COM

Supported
Devices

Device Manufacturer Comment
Series 90-30 General Electric -
Series 90-70 General Electric -
Series Five General Electric -
Series One General Electric -
Series Six General Electric -

Additional
Requirements

Software Manufacturer Vendor Part No. Comment
LogicMaster 5 Software Logicmaster General Electric - Used to assign CPU station ID and to program the Series Five PC.

Protocol

Type Supported Baud Rates Data Bits Stop Bits Parity Error Checking Hand Shaking Comment
Direct Link, Multi-Drop GE Master-Slave Protocol Selectable from 110 to 38400 7, 8 1, 2 None, Odd, Even - None, RTS/CTS, DTR/DSR -

Supported
Data Types

Data Type Comment
ASCII 8-bit character
Digital ON/OFF status
Float 32-bit floating point (IEEE)
Long Unsigned 32-bit integer
Signed Signed 16-bit integer
Unsigned Unsigned 16-bit integer

Supported
Memory Types

Device Memory Type Comment
Series 90-30 & Series 90-70 I Input Table
Series 90-30 & Series 90-70 Q Output Table
Series 90-30 & Series 90-70 R Register Table
Series Five I Local Inputs
Series Five I1+ I1+ Inputs
Series Five I1- Special Inputs
Series Five I2+ I2+ Inputs
Series Five IO Local Input Override
Series Five IO1+ I1+ Input Override
Series Five IO2+ I2+ Input Override
Series Five O Local Outputs
Series Five O1+ O1+ Outputs
Series Five O1- Internal Coils
Series Five O2+ O2+ Outputs
Series Five O2- Internal Coils
Series Five OO Local Output Override
Series Five OO1+ O1+ Input Override
Series Five OO1- Internal Coil Override
Series Five OO2+ O2+ Input Override
Series Five OO2- Internal Coil Override
Series Five R Registers
Series One CO Internal Coils
Series One DR Data Registers
Series One EX External I/O
Series One SR Shift Register
Series One TM Timers/Counters
Series One US Timer/Counter Up Status
Series Six AI Auxilliary Input (maps to register memory)
Series Six AO Auxilliary Output (maps to register memory)
Series Six I Input Table
Series Six I0- Real I/O (maps to register memory)
Series Six I1+ Real I/O (maps to register memory)
Series Six I1- Real I/O (maps to register memory)
Series Six I9+ Real I/O (maps to register memory)
Series Six IA+ Real I/O (maps to register memory)
Series Six IA- Real I/O (maps to register memory)
Series Six IO Input Override Switch (protected by CPU memory switch)
Series Six O Output Table
Series Six O0- Real I/O (maps to register memory)
Series Six O1+ Real I/O (maps to register memory)
Series Six O1- Real I/O (maps to register memory)
Series Six O2+ thru O7+ or
I2+ thru I7+		 Real I/O (maps to register memory)
Series Six O2- thru O9- or
I2- thru I9-		 Real I/O (maps to register memory)
Series Six O9+ Real I/O (maps to register memory)
Series Six OA+ Real I/O (maps to register memory)
Series Six OA- Real I/O (maps to register memory)
Series Six OB+ thru OF+ or
IB+ thru IF+		 Real I/O (maps to register memory)
Series Six OB- thru OF- or
IB- thru IF-		 Real I/O (maps to register memory)
Series Six OO Output Override Switch (protected by CPU memory switch)
Series Six R Registers

Commands

Device Command Description Uses
none

Signal
Conditionings

Signal Type Description Comment Typical Gain Convergance Range
12AL 12 Bit Binary Scaled to EGUs - Alarming on out of range Ignores most significant 4 bits (nibble). - -
12BN 12 Bit Binary Scaled to EGUs- No Alarming on out of range Ignores most significant 4 bits (nibble). - -
15AL 15 Bit Binary Scaled to EGUs - Alarming on out of range Ignores most significant bit. - -
15BN 15 Bit Binary Scaled to EGUs - No Alarming on out of range Ignores most significant bit. - -
3BCD 3 Digit Binary Coded Decimal Scaled to EGUs. Alarming on out of range. Ignores most significant 4 bits (nibble). - -
4BCD 4 Digit Binary Coded Decimal Scaled to EGUs. Alarming on out of range. - -
8AL 8 Bit Binary Scaled to EGUs - Alarming on out of range Ignores most significant byte. - -
8BN 8 Bit Binary Scaled to EGUs - No alarming on out of range Ignores most significant byte. - -
LIN Value scaled to EGUs No alarming on out of range. Signed and Unsigned data types. - -
LZ12 12 Bit 4-20 mA inputs - Alarming out of range Live 0 scaling on 12-bit raw data (819-4095). Scaled to EGUs. - -
LZ15 15 Bit 4-20 mA inputs - Alarming out of range Live 0 scaling on 15-bit raw data (6553-32767). Scaled to EGUs. - -
NONE Returns raw value No alarming on out of range. - -
SQ12 Square Root Input Only Alarming on out of range (input only). - -
SQ15 0 to 32767 Square Root Conditioning Alarming on out of range (input only). - -

Miscellaneous
Info

Relevant Notes
none

History

Revision History
Reason for 6.01a Release on 1/13/97:
* Driver released including all previous SIMs.

Reason for 6.01a Release on 12/10/98:
* Corrected problem of Data Register values being written to
the wrong locations when writing to DR memory in a PLC
Direct DL340 (GE Series One Plus). 400oct works, but all
addresses above that seem to read/write an address as if it
were multiplied by 2 (addressing 404oct appeared to access
410oct).

Reason for 6.01b Release on 6/10/05:
* Driver has been rebranded to reflect GE Fanuc.


Details
ID: DG67
Category: I/O Drivers
Last Updated: 03/29/10
Date Created: 04/24/00
Status: Published
Attachments: Yes
Language: English


 


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